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1. general description the 74aup1g58 provides configurable multiple functions. the output state is determined by eight patterns of 3-bit input. the user can choose the logic functions and, or, nand, nor, xor, inverter and buffer. all inputs can be connected to v cc or gnd. this device ensures a very low static and dynamic power consumption across the entire v cc range from 0.8 v to 3.6 v. this device is fully specified for pa rtial power-down ap plications using i off . the i off circuitry disables the output, preventin g the damaging backflow current through the device when it is powered down. the 74aup1g58 has schmitt trigger inputs ma king it capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. the inputs switch at different points for posit ive and negative-going si gnals. the difference between the positive voltage v t+ and the negative voltage v t ? is defined as the input hysteresis voltage v h . 2. features and benefits ? wide supply voltage range from 0.8 v to 3.6 v ? high noise immunity ? esd protection: ? hbm jesd22-a114f exceeds 5000 v ? mm jesd22-a115-a exceeds 200 v ? cdm jesd22-c101e exceeds 1000 v ? low static power consumption; i cc = 0.9 ? a (maximum) ? latch-up performance exceeds 100 ma per jesd 78 class ii ? inputs accept voltages up to 3.6 v ? low noise overshoot and undershoot < 10 % of v cc ? i off circuitry provides partial power-down mode operation ? multiple package options ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c 74aup1g58 low-power configurable multiple function gate rev. 6 ? 15 august 2012 product data sheet
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 2 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 3. ordering information 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram table 1. ordering information type number package temperature range name description version 74aup1g58gw ? 40 ? c to +125 ? c sc-88 plastic surface-mounted package; 6 leads sot363 74aup1g58gm ? 40 ? c to +125 ? c xson6 plastic extremely thin sm all outline package; no leads; 6 terminals; body 1 ? 1.45 ? 0.5 mm sot886 74aup1g58gf ? 40 ? c to +125 ? c xson6 plastic extremely thin sm all outline package; no leads; 6 terminals; body 1 ? 1 ? 0.5 mm sot891 74AUP1G58GN ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 0.9 ? 1.0 ? 0.35 mm sot1115 74aup1g58gs ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 1.0 ? 1.0 ? 0.35 mm sot1202 table 2. marking type number marking code [1] 74aup1g58gw ak 74aup1g58gm ak 74aup1g58gf ak 74AUP1G58GN ak 74aup1g58gs ak fig 1. logic symbol y c b a 6 1 3 4 001aab687
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 3 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level. fig 2. pin configuration sot363 fig 3. pin config uration sot886 fig 4. pin configuration sot891, sot1115 and sot1202 74aup1g58 bc gnd ay 001aad697 1 2 3 6 v cc 5 4 gnd 001aad698 b a v cc c y transparent top view 2 3 1 5 4 6 74aup1g58 74aup1g58 gnd 001aad690 b a v cc c y transparent top view 2 3 1 5 4 6 table 3. pin description symbol pin description b 1 data input gnd 2 ground (0 v) a 3 data input y 4 data output v cc 5 supply voltage c 6 data input table 4. function table [1] input output c b a y llll llhh lhll lhhh hl l h hl hh hhl l hhhl
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 4 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 7.1 logic configurations table 5. function selection table logic function figure 2-input nand see figure 5 2-input nand with both inputs inverted see figure 8 2-input and with inverted input see figure 6 and figure 7 2-input nor with inverted input see figure 6 and figure 7 2-input or see figure 8 2-input or with both inputs inverted see figure 5 2-input xor see figure 9 buffer see figure 10 inverter see figure 11 fig 5. 2-input nand gate or 2-input or with both inputs inverted fig 6. 2-input and gate with inverted b input or 2-input nor gate with inverted c input 001aab688 b b6 y c 1 52 4 3y y c b c v cc 001aab689 b b6 y c 1 52 4 3y y c b c v cc fig 7. 2-input and gate with inverted c input or 2-input nor gate with inverted a input fig 8. 2-input or gate or 2-input nand gate with both inputs inverted 001aab690 a a 6 y c 1 52 4 3y y c a c v cc 001aab691 a 6c 1 52 4 3y v cc a y c y a c fig 9. 2-input xor gate fig 10. buffer 001aab692 b6c 1 52 4 3y v cc y b c 001aab693 a a 6 y 1 52 4 3y v cc
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 5 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 8. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] for sc-88 packages: above 87.5 ? c the value of p tot derates linearly with 4.0 mw/k. for xson6 packages: above 118 ? c the value of p tot derates linearly with 7.8 mw/k. 9. recommended operating conditions fig 11. inverter 001aab694 b b6 y 1 52 4 3y v cc table 6. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +4.6 v i ik input clamping current v i <0v ? 50 - ma v i input voltage [1] ? 0.5 +4.6 v i ok output clamping current v o <0v ? 50 - ma v o output voltage active mode and power-down mode [1] ? 0.5 +4.6 v i o output current v o =0 vtov cc - ? 20 ma i cc supply current - 50 ma i gnd ground current ? 50 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? c to +125 ?c [2] -2 5 0m w table 7. recommended operating conditions symbol parameter conditions min max unit v cc supply voltage 0.8 3.6 v v i input voltage 0 3.6 v v o output voltage active mode 0 v cc v power-down mode; v cc =0v 0 3.6 v t amb ambient temperature ? 40 +125 ?c
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 6 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 10. static characteristics table 8. static characteristics at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit t amb = 25 ?c v oh high-level output voltage v i = v t+ or v t ? i o = ? 20 ? a; v cc = 0.8 v to 3.6 v v cc ? 0.1 - - v i o = ? 1.1 ma; v cc = 1.1 v 0.75 ? v cc -- v i o = ? 1.7 ma; v cc = 1.4 v 1.11 - - v i o = ? 1.9 ma; v cc = 1.65 v 1.32 - - v i o = ? 2.3 ma; v cc = 2.3 v 2.05 - - v i o = ? 3.1 ma; v cc = 2.3 v 1.9 - - v i o = ? 2.7 ma; v cc = 3.0 v 2.72 - - v i o = ? 4.0 ma; v cc = 3.0 v 2.6 - - v v ol low-level output voltage v i = v t+ or v t ? i o = 20 ? a; v cc = 0.8 v to 3.6 v - - 0.1 v i o = 1.1 ma; v cc = 1.1 v - - 0.3 ? v cc v i o = 1.7 ma; v cc = 1.4 v - - 0.31 v i o = 1.9 ma; v cc = 1.65 v - - 0.31 v i o = 2.3 ma; v cc = 2.3 v - - 0.31 v i o = 3.1 ma; v cc = 2.3 v - - 0.44 v i o = 2.7 ma; v cc = 3.0 v - - 0.31 v i o = 4.0 ma; v cc = 3.0 v - - 0.44 v i i input leakage current v i = gnd to 3.6 v; v cc = 0 v to 3.6 v - - ? 0.1 ? a i off power-off leakage current v i or v o = 0 v to 3.6 v; v cc = 0 v - - ? 0.2 ? a ? i off additional power-off leakage current v i or v o = 0 v to 3.6 v; v cc =0vto0.2v -- ? 0.2 ? a i cc supply current v i = gnd or v cc ; i o = 0 a; v cc = 0.8 v to 3.6 v --0.5 ? a ? i cc additional supply current v i = v cc ? 0.6 v; i o = 0 a; v cc =3.3v --4 0 ? a c i input capacitance v i = gnd or v cc ; v cc = 0 v to 3.6 v - 1.1 - pf c o output capacitance v o = gnd; v cc = 0 v - 1.8 - pf t amb = ? 40 ?c to +85 ?c v oh high-level output voltage v i = v t+ or v t ? i o = ? 20 ? a; v cc = 0.8 v to 3.6 v v cc ? 0.1 - - v i o = ? 1.1 ma; v cc = 1.1 v 0.7 ? v cc -- v i o = ? 1.7 ma; v cc = 1.4 v 1.03 - - v i o = ? 1.9 ma; v cc = 1.65 v 1.30 - - v i o = ? 2.3 ma; v cc = 2.3 v 1.97 - - v i o = ? 3.1 ma; v cc = 2.3 v 1.85 - - v i o = ? 2.7 ma; v cc = 3.0 v 2.67 - - v i o = ? 4.0 ma; v cc = 3.0 v 2.55 - - v
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 7 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate v ol low-level output voltage v i = v t+ or v t ? i o = 20 ? a; v cc = 0.8 v to 3.6 v - - 0.1 v i o = 1.1 ma; v cc = 1.1 v - - 0.3 ? v cc v i o = 1.7 ma; v cc = 1.4 v - - 0.37 v i o = 1.9 ma; v cc = 1.65 v - - 0.35 v i o = 2.3 ma; v cc = 2.3 v - - 0.33 v i o = 3.1 ma; v cc = 2.3 v - - 0.45 v i o = 2.7 ma; v cc = 3.0 v - - 0.33 v i o = 4.0 ma; v cc = 3.0 v - - 0.45 v i i input leakage current v i = gnd to 3.6 v; v cc = 0 v to 3.6 v - - ? 0.5 ? a i off power-off leakage current v i or v o = 0 v to 3.6 v; v cc = 0 v - - ? 0.5 ? a ? i off additional power-off leakage current v i or v o = 0 v to 3.6 v; v cc =0vto0.2v -- ? 0.6 ? a i cc supply current v i = gnd or v cc ; i o = 0 a; v cc = 0.8 v to 3.6 v --0.9 ? a ? i cc additional supply current v i = v cc ? 0.6 v; i o = 0 a; v cc =3.3v --5 0 ? a t amb = ? 40 ? c to +125 ?c v oh high-level output voltage v i = v t+ or v t ? i o = ? 20 ? a; v cc = 0.8 v to 3.6 v v cc ? 0.11 - - v i o = ? 1.1 ma; v cc = 1.1 v 0.6 ? v cc -- v i o = ? 1.7 ma; v cc = 1.4 v 0.93 - - v i o = ? 1.9 ma; v cc = 1.65 v 1.17 - - v i o = ? 2.3 ma; v cc = 2.3 v 1.77 - - v i o = ? 3.1 ma; v cc = 2.3 v 1.67 - - v i o = ? 2.7 ma; v cc = 3.0 v 2.40 - - v i o = ? 4.0 ma; v cc = 3.0 v 2.30 - - v v ol low-level output voltage v i = v t+ or v t ? i o = 20 ? a; v cc = 0.8 v to 3.6 v - - 0.11 v i o = 1.1 ma; v cc = 1.1 v - - 0.33 ? v cc v i o = 1.7 ma; v cc = 1.4 v - - 0.41 v i o = 1.9 ma; v cc = 1.65 v - - 0.39 v i o = 2.3 ma; v cc = 2.3 v - - 0.36 v i o = 3.1 ma; v cc = 2.3 v - - 0.50 v i o = 2.7 ma; v cc = 3.0 v - - 0.36 v i o = 4.0 ma; v cc = 3.0 v - - 0.50 v i i input leakage current v i = gnd to 3.6 v; v cc = 0 v to 3.6 v - - ? 0.75 ? a i off power-off leakage current v i or v o = 0 v to 3.6 v; v cc = 0 v - - ? 0.75 ? a table 8. static characteristics ?continued at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 8 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 11. dynamic characteristics ? i off additional power-off leakage current v i or v o = 0 v to 3.6 v; v cc =0vto0.2v -- ? 0.75 ? a i cc supply current v i = gnd or v cc ; i o = 0 a; v cc = 0.8 v to 3.6 v --1.4 ? a ? i cc additional supply current v i = v cc ? 0.6 v; i o = 0 a; v cc =3.3v --7 5 ? a table 8. static characteristics ?continued at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit table 9. dynamic characteristics voltages are referenced to gnd (ground = 0 v); for test circuit see figure 13 . symbol parameter conditions 25 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max (85 ?c) max (125 ?c) c l = 5 pf t pd propagation delay a, b and c to y; see figure 12 [2] v cc = 0.8 v - 22.8 - - - - ns v cc = 1.1 v to 1.3 v 2.8 6.6 12.9 2.6 13.1 13.3 ns v cc = 1.4 v to 1.6 v 2.4 4.8 7.6 2.4 8.3 8.6 ns v cc = 1.65 v to 1.95 v 2.1 4.0 6.3 2.0 6.9 7.3 ns v cc = 2.3 v to 2.7 v 2.0 3.2 4.6 1.8 5.1 5.4 ns v cc = 3.0 v to 3.6 v 1.9 2.9 3.9 1.6 4.2 4.4 ns c l = 10 pf t pd propagation delay a, b and c to y; see figure 12 [2] v cc = 0.8 v - 26.4 - - - - ns v cc = 1.1 v to 1.3 v 3.2 7.4 14.5 3.0 14.9 15.2 ns v cc = 1.4 v to 1.6 v 2.7 5.4 8.7 2.7 9.4 9.8 ns v cc = 1.65 v to 1.95 v 2.5 4.5 7.1 2.3 7.9 8.3 ns v cc = 2.3 v to 2.7 v 2.4 3.8 5.3 2.2 5.9 6.2 ns v cc = 3.0 v to 3.6 v 2.3 3.5 4.6 1.9 4.9 5.1 ns c l = 15 pf t pd propagation delay a, b and c to y; see figure 12 [2] v cc = 0.8 v - 29.9 - - - - ns v cc = 1.1 v to 1.3 v 3.6 8.3 16.1 3.3 16.7 17.0 ns v cc = 1.4 v to 1.6 v 3.0 5.9 9.7 3.0 10.5 11.0 ns v cc = 1.65 v to 1.95 v 2.8 5.0 7.9 2.5 8.7 9.2 ns v cc = 2.3 v to 2.7 v 2.7 4.2 5.9 2.5 6.6 6.9 ns v cc = 3.0 v to 3.6 v 2.5 3.9 5.2 2.2 5.5 5.8 ns
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 9 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate [1] all typical values are measured at nominal v cc . [2] t pd is the same as t plh and t phl . [3] all specified values are the avera ge typical values over all stated loads. [4] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i ? n+ ? (c l ? v cc 2 ? f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l ? v cc 2 ? f o ) = sum of the outputs. c l = 30 pf t pd propagation delay a, b and c to y; see figure 12 [2] v cc = 0.8 v - 38.0 - - - - ns v cc = 1.1 v to 1.3 v 4.5 10.5 20.8 4.1 21.9 24.1 ns v cc = 1.4 v to 1.6 v 3.8 7.5 12.2 3.8 13.5 14.1 ns v cc = 1.65 v to 1.95 v 3.4 6.3 10.0 3.1 11.2 11.9 ns v cc = 2.3 v to 2.7 v 3.4 5.3 7.5 3.1 8.4 8.9 ns v cc = 3.0 v to 3.6 v 3.3 5.0 6.6 2.9 7.1 7.4 ns c l = 5 pf, 10 pf, 15 pf and 30 pf c pd power dissipation capacitance f i = 1 mhz; v i =gndto v cc [3] [4] v cc = 0.8 v - 2.7 - - - - pf v cc = 1.1 v to 1.3 v - 2.8 - - - - pf v cc = 1.4 v to 1.6 v - 3.0 - - - - pf v cc = 1.65 v to 1.95 v - 3.2 - - - - pf v cc = 2.3 v to 2.7 v - 3.8 - - - - pf v cc = 3.0 v to 3.6 v - 4.4 - - - - pf table 9. dynamic characteristics ?continued voltages are referenced to gnd (ground = 0 v); for test circuit see figure 13 . symbol parameter conditions 25 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max (85 ?c) max (125 ?c)
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 10 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 12. waveforms measurement points are given in table 10 . v ol and v oh are typical output voltage drop that occur with the output load. fig 12. input a, b and c to output y propagation delay times y output a, b, c input y output gnd v i v oh v oh v ol v ol v m v m v m v m v m v m t plh t plh t phl t phl 001aab593 table 10. measurement points supply voltage output input v cc v m v m v i t r = t f 0.8 v to 3.6 v 0.5 ? v cc 0.5 ? v cc v cc ? 3.0 ns
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 11 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate [1] for measuring enable and disable times r l = 5 k ? , for measuring propagation delays, setup and hold times and pulse width r l = 1 m ? . test data is given in table 11 . definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 13. test circuit for measuring switching times 001aac521 dut r t v i v o v ext v cc r l 5 k c l g table 11. test data supply voltage load v ext v cc c l r l [1] t plh , t phl t pzh , t phz t pzl , t plz 0.8 v to 3.6 v 5 pf, 10 pf, 15 pf and 30 pf 5 k ? or 1 m ? open gnd 2 ? v cc
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 12 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 13. transfer characteristics 14. waveforms trans fer characteristics table 12. transfer characteristics voltages are referenced to gnd (ground = 0 v; for test circuit see figure 13 . symbol parameter conditions 25 ?c ? 40 ? c to +125 ?c unit min typ max min max (85 ?c) max (125 ?c) v t+ positive-going threshold voltage see figure 14 and figure 15 v cc = 0.8 v 0.30 - 0.60 0.30 0.60 0.62 v v cc = 1.1 v 0.53 - 0.90 0.53 0.90 0.92 v v cc = 1.4 v 0.74 - 1.11 0.74 1.11 1.13 v v cc = 1.65 v 0.91 - 1.29 0.91 1.29 1.31 v v cc = 2.3 v 1.37 - 1.77 1.37 1.77 1.80 v v cc = 3.0 v 1.88 - 2.29 1.88 2.29 2.32 v v t ? negative-going threshold voltage see figure 14 and figure 15 v cc = 0.8 v 0.10 - 0.60 0.10 0.60 0.60 v v cc = 1.1 v 0.26 - 0.65 0.26 0.65 0.65 v v cc = 1.4 v 0.39 - 0.75 0.39 0.75 0.75 v v cc = 1.65 v 0.47 - 0.84 0.47 0.84 0.84 v v cc = 2.3 v 0.69 - 1.04 0.69 1.04 1.04 v v cc = 3.0 v 0.88 - 1.24 0.88 1.24 1.24 v v h hysteresis voltage (v t+ ? v t ? ); see figure 14 , figure 15 , figure 16 and figure 17 v cc = 0.8 v 0.07 - 0.50 0.07 0.50 0.50 v v cc = 1.1 v 0.08 - 0.46 0.08 0.46 0.46 v v cc = 1.4 v 0.18 - 0.56 0.18 0.56 0.56 v v cc = 1.65 v 0.27 - 0.66 0.27 0.66 0.66 v v cc = 2.3 v 0.53 - 0.92 0.53 0.92 0.92 v v cc = 3.0 v 0.79 - 1.31 0.79 1.31 1.31 v v t+ and v t ? limits at 70 % and 20 %. fig 14. transfer characteristic fig 15. definition of v t+ , v t ? and v h mna207 v o v i v h v t+ v t? mna208 v o v i v h v t+ v t?
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 13 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate fig 16. typical transfer characteristics; v cc = 1.8 v v i (v) 0 2.0 1.6 0.8 1.2 0.4 001aad691 80 160 240 i cc (a) 0 fig 17. typical transfer characteristics; v cc = 3.0 v 001aad692 v i (v) 0 3.0 2.0 1.0 400 800 1200 i cc (a) 0
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 14 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 15. package outline fig 18. package outline sot363 (sc-88) references outline version european projection issue date iec jedec jeita sot363 sc-88 wb m b p d e 1 e pin 1 index a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 45 6 plastic surface-mounted package; 6 leads sot363 unit a 1 max b p cd e e 1 h e l p qy wv mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.45 0.15 0.25 0.15 a 1.1 0.8 04-11-08 06-03-16
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 15 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate fig 19. package outline sot886 (xson6) references outline version european projection issue date iec jedec jeita sot886 mo-252 sot886_po 04-07-22 12-01-05 unit mm max nom min 0.5 0.04 1.50 1.45 1.40 1.05 1.00 0.95 0.35 0.30 0.27 0.40 0.35 0.32 0.6 a (1) dimensions (mm are the original dimensions) notes 1. including plating thickness. 2. can be visible in some manufacturing processes. xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm sot886 a 1 b 0.25 0.20 0.17 deee 1 0.5 ll 1 terminal 1 index area d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale 1 6 2 5 3 4 6x (2) 4x (2) a
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 16 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate fig 20. package outline sot891 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot891 sot891 05-04-06 07-05-15 xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale dimensions (mm are the original dimensions) unit mm 0.20 0.12 1.05 0.95 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.35 0.55 a max 0.5 0.04 1 6 2 5 3 4 a 6 (1) 4 (1) note 1. can be visible in some manufacturing processes.
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 17 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate fig 21. package outline sot1115 (xson6) references outline version european projection issue date iec jedec jeita sot1115 sot1115_po 10-04-02 10-04-07 unit mm max nom min 0.35 0.04 0.95 0.90 0.85 1.05 1.00 0.95 0.55 0.3 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm sot1115 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l l 1 b 321 6 5 4 (6) (2) a 1 a
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 18 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate fig 22. package outline sot1202 (xson6) references outline version european projection issue date iec jedec jeita sot1202 sot1202_po 10-04-02 10-04-06 unit mm max nom min 0.35 0.04 1.05 1.00 0.95 1.05 1.00 0.95 0.55 0.35 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm sot1202 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l b 123 l 1 6 5 4 (6) (2) a a 1
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 19 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 16. abbreviations 17. revision history table 13. abbreviations acronym description cdm charged device model dut device under test esd electrostatic discharge hbm human body model mm machine model table 14. revision history document id release date data sheet status change notice supersedes 74aup1g58 v.6 20120815 product data sheet - 74aup1g58 v.5 modifications: ? package outline drawing of sot886 ( figure 19 ) modified. 74aup1g58 v.5 20111129 product data sheet - 74aup1g58 v.4 74aup1g58 v.4 20101011 product data sheet - 74aup1g58 v.3 74aup1g58 v.3 20090622 product data sheet - 74aup1g58 v.2 74aup1g58 v.2 20090326 product data sheet - 74aup1g58 v.1 74aup1g58 v.1 20070131 product data sheet - -
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 20 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate 18. legal information 18.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 18.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 18.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74aup1g58 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 6 ? 15 august 2012 21 of 22 nxp semiconductors 74aup1g58 low-power configurable multiple function gate export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 18.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 19. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74aup1g58 low-power configurable multiple function gate ? nxp b.v. 2012. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 15 august 2012 document identifier: 74aup1g58 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 20. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 7.1 logic configurations . . . . . . . . . . . . . . . . . . . . . 4 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 recommended operating conditions. . . . . . . . 5 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 6 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 8 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 13 transfer characteristics . . . . . . . . . . . . . . . . . 12 14 waveforms transfer characteristics. . . . . . . . 12 15 package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 16 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 19 17 revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 18 legal information. . . . . . . . . . . . . . . . . . . . . . . 20 18.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 20 18.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 18.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 18.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 21 19 contact information. . . . . . . . . . . . . . . . . . . . . 21 20 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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